5.35 Block Erase_64KB (BE_64KB)

The Block Erase_64KB (D8H) instruction clears all bits in the selected 64-Kbyte block to 1. A Block Erase_64KB instruction applied to a protected memory area will be ignored. Before initiating any write operation, the WREN instruction must be executed. The CE# signal must remain active-low for the duration of any command sequence. To perform a Block Erase_64KB operation, the host drives CE# low, issues the Block Erase command (D8H), transmits three address bytes, and then drives CE# high. Address bits [AMS-A16], where AMS represents the Most Significant Address, define the target block; the remaining address bits may be driven to either VIL or VIH. Completion of the internally self-timed Block Erase 64 KB operation can be determined by polling the BUSY bit in the STATUS register or by waiting for the specified TBE64KB duration. See Figure 5-28 and Figure 5-29 for the Block Erase sequences.

Figure 5-30. Block Erase Sequence (SPI)
Note: MSb = Most Significant bit
Figure 5-31. Block Erase Sequence (QPI)
Note: MSN = Most Significant Nibble; LSN = Lease Significant Nibble, C[1:0] = D8H