9.3.6.26 FIFO_SIZE_REG Bit Definitions

Table 9-48. FIFO_SIZE_REG
Bit NumberNameReset ValueFunction
[7:4]Rx FIFO SizeN/AReturns the sizes of the FIFOs associated with the selected additional transmit/receive endpoints. The lower nibble, [3:0], encodes the size of the selected transmit endpoint FIFO; the upper nibble, [7:4], encodes the size of the selected receive endpoint FIFO. Values of 3 – 13 correspond to a FIFO size of 2n bytes (8 – 8,192 bytes). If an endpoint has not been configured, a value of 0 is displayed. When the transmit and receive endpoints share the same FIFO, the Rx FIFO size will be encoded as 0xF.

The register only has this interpretation when the Index register is set to select one of endpoints 1 – 15 and dynamic sizing is not selected. It has a special interpretation when the INDEX_REG is set to select endpoint0; the result returned is not valid where dynamic FIFO sizing is used.

[3:0]Tx FIFO SizeN/A