5.2.2 Status Register Protection
The SRP bits (SRP0 and SRP1) in Status Register 1 and Status Register 2 provide various levels of protection to the three Status registers (see Table 5-3 for description).
| SRP1 | SRP0 | /WP | Status Register | Description |
|---|---|---|---|---|
| 0 | 0 | X | Software Protection | The Status registers can be written to after issuing a Write Enable instruction, WEL = 1 |
| 0 | 1 | 0 | Hardware Protected | The Status registers are locked and cannot be written. |
| 0 | 1 | 1 | Hardware Unprotected | The Status registers are unlocked and can be written. |
| 1 | 0 | X | Power Supply Lock‑Down | The Status registers are protected and cannot be written to until the next power cycle. A power cycle will reset the SRP1 value to 0 and SRP0 value to 0. |
| 1 | 1 | X | One‑Time‑Programmable | The Status registers are permanently protected and cannot be written. |