5.50 Block Erase_64KB_4Byte (BE_64KB_4Byte)

The Block Erase_64KB_4Byte instruction clears all bits within the selected 64-KB block to 1. If the instruction is issued for a protected memory region, the erase operation is ignored. Before initiating any write operation, execute the WREN instruction. The CE# signal must remain active-low throughout the entire command sequence. To perform a Block Erase_64KB_4Byte operation, the host drives CE# low, issues the Block Erase command cycle (DCH), transmits three address cycles, and then drives CE# high. Address bits [A_MS–A₁₆], where A_MS represents the Most Significant Address, specify the target block address, while the remaining address bits may be set to either V_IL or V_IH. Completion of the internally timed Block Erase_64KB_4Byte operation can be verified by polling the Busy bit in the status register or by waiting for the T_BE64KB interval.