5.5.2 Software Reset Operation
The software reset sequence consists of issuing a Reset Enable command (66H), followed by a Reset command (99H). Any command issued after the Reset Enable command, other than the Reset command, cancels the reset enable condition.
Once the Reset Enable and Reset commands are successfully executed, the device requires maximum TRECW to return to its initial power-on state.
| Function/Register | After Power Cycle/Hardware Reset/Software Reset |
|---|---|
| Communication Protocol | SPI |
| Status Register 1 | Busy = 0, WEL = 0.BP0, BP1, BP2, TB and SEC values are copied from their nonvolatile storage, provided that the Status registers are not protected. |
| Status Register 2 | SUS = 0IOC and CMP values are copied from their nonvolatile storage, provided that the Status registers are not protected. |
| Status Register 3 | DC0, DC1, DRV0, DRV1 and HOLDRST values are copied from their nonvolatile storage, provided that the Status registers are not protected. |
| Read Parameter Bits P[5:4] | P[5,4] = (0,0); P[1,0] = (0,0) |
| Wrap | W[6,5] = (0,0); W4 = 1 |