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15.3.1.49 PWM Generator Fault PCI 2(1)
Note:
Caution should be exercised when modifying this register while PGxCON.ON = 1;
unexpected results may occur.
This bit has no effect when the
SWTERM control bit is used as the PCI Termination Event or if TERM[2:0] <
‘101’.
Name: APGxF1PCI2 Offset: 0x1454, 0x14C8, 0x153C,
0x15B0
Bit 31 30 29 28 27 26 25 24 PSS[31:24] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16 PSS[23:16] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 PSS[15:8] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0 PSS[7:0] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bits 31:0 – PSS[31:0] PCI Source Selection
bits
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