Note: This register cannot be modified while PGxSTAT.UPDATE =
1.
Name:
APGxDT
Offset:
0x14A4, 0x1518, 0x158C,
0x1600
Bit
31
30
29
28
27
26
25
24
DTH[14:8]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
DTH[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
DTL[14:8]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
DTL[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bits 30:16 – DTH[14:0] PWMx Dead-Time Delay
bits
Bits 14:0 – DTL[14:0] PWMxL Dead-Time Delay
bits
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
