15.3.1.9 Combinatorial PWM Logic Control Register y

Note:
  1. ‘y’ denotes a common instance (A-F).
  2. Instances of y = A, C and E of LOGCONy assign logic function output to the PWMxH pin. Instances of y = B, D and F of LOGCONy assign logic function to the PWMxL pin.
Name: LOGCONy
Offset: 0x1020, 0x1024, 0x1028, 0x102C, 0x1030, 0x1034

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
 PWMS1y[3:0]PWMS2y[3:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 S1yPOLS2yPOLPWMLFy[1:0] PWMLFyD[2:0] 
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 

Bits 15:12 – PWMS1y[3:0] Combinatorial PWM Logic Source #1 Selection bits

ValueDescription
1111 PWML8
1110 PWMH8
1101 PWML7
1100 PWMH7
1011 PWML6
1010 PWMH6
1001 PWML5
1000 PWMH5
0111 PWML4
0110 PWMH4
0101 PWML3
0100 PWMH3
0011 PWML2
0010 PWMH2
0001 PWML1
0000 PWMH1

Bits 11:8 – PWMS2y[3:0] Combinatorial PWM Logic Source #2 Selection bits

ValueDescription
1111 PWML8
1110 PWMH8
1101 PWML7
1100 PWMH7
1011 PWML6
1010 PWMH6
1001 PWML5
1000 PWMH5
0111 PWML4
0110 PWMH4
0101 PWML3
0100 PWMH3
0011 PWML2
0010 PWMH2
0001 PWML1
0000 PWMH1

Bit 7 – S1yPOL Combinatorial PWM Logic Source #1 Polarity bit

ValueDescription
1

Input is inverted.

0

Input is positive logic.

Bit 6 – S2yPOL Combinatorial PWM Logic Source #2 Polarity bit

ValueDescription
1

Input is inverted.

0

Input is positive logic.

Bits 5:4 – PWMLFy[1:0] Combinatorial PWM Logic Function Selection bits

ValueDescription
11

Reserved

10

PWMS1y ^ PWMS2y (XOR)

01

PWMS1y & PWMS2y (AND)

00

PWMS1y | PWMS2y (OR)

Bits 2:0 – PWMLFyD[2:0]  Combinatorial PWM Logic Destination Selection bits(2)

ValueDescription
111 Logic Function assigned to PWM8.
110 Logic Function assigned to PWM7.
101 Logic Function assigned to PWM6.
100 Logic Function assigned to PWM5.
011 Logic Function assigned to PWM4.
010 Logic Function assigned to PWM3.
001 Logic Function assigned to PWM2.
000 No assignment. PWM Logic Function y is disabled.