15.3.1.18 PWM PCI 2(1) Note: y = F1, F2, CL, FF, or S. Name: PGxyPCI2Offset: 0x106C, 0x10E0, 0x1154, 0x11C8, 0x123C, 0x12B0, 0x1324, 0x1398Bit 3130292827262524 PSS[31:24] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000 Bit 2322212019181716 PSS[23:16] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000 Bit 15141312111098 PSS[15:8] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000 Bit 76543210 PSS[7:0] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000 Bits 31:0 – PSS[31:0] PCI Source Selection bits Refer to Table 15-3 for device-specific PSS bit information.
Bit 3130292827262524 PSS[31:24] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000 Bit 2322212019181716 PSS[23:16] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000 Bit 15141312111098 PSS[15:8] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000 Bit 76543210 PSS[7:0] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000
Bits 31:0 – PSS[31:0] PCI Source Selection bits Refer to Table 15-3 for device-specific PSS bit information.