12.2.17 CAN Data Bit Time Configuration Register Low

Note:

This register can only be modified in Configuration mode (OPMOD[2:0] = 100).

Name:	C1DBTCFGL(1)
Offset:	0x6C8


Bit	15	14	13	12	11	10	9	8
					TSEG2[3:0]
Access					R/W	R/W	R/W	R/W
Reset					0	0	1	1


Bit	7	6	5	4	3	2	1	0
					SJW[3:0]
Access					R/W	R/W	R/W	R/W
Reset					0	0	1	1

Bits 11:8 – TSEG2[3:0] Time Segment 2 bits (Phase Segment 2)

Value	Description
`1111`	Length is 16 x T_Q
. . .
`0000`	Length is 1 x T_Q

Bits 3:0 – SJW[3:0] Synchronization Jump Width bits

Value	Description
`1111`	Length is 16 x T_Q
. . .
`0000`	Length is 1 x T_Q

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