12.2.55 CAN Transmit Queue User Address Register Low
Note:
- This register is not ensured to read correctly in Configuration mode and should only be accessed when the module is not in Configuration mode.
Legend: x = Bit is unknown
| Name: | C1TXQUAL(1) |
| Offset: | 0x718 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| TXQUA[15:8] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | x | x | x | x | x | x | x | x | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TXQUA[7:0] | |||||||||
| Access | R | R | R | R | R | R | R | R | |
| Reset | x | x | x | x | x | x | x | x | |
Bits 15:0 – TXQUA[15:0] TXQ User Address bits
A read of this register will return the address where the next message is to be written (TXQ head).