5.6.7 I/O Configuration (IOC)
The IO Configuration (IOC) bit is a read/write bit in Status Register 2 that enables Quad SPI and QPI operation. When IOC = 0, the /WP and /HOLD pins are enabled. When IOC = 1, the Quad SIO2 and SIO3 pins are enabled, and the /WP and /HOLD functions are disabled.
The IOC bit must be set to
1 before issuing the Enter QPI (38h) command to switch the device from Standard, Dual or Quad SPI mode to QPI mode; otherwise, the command is ignored. Once the device enters QPI mode, the IOC bit remains set to 1. While operating in QPI mode, a Write Status Register command cannot change the IOC bit from 1 to 0. Note: If the /WP or /HOLD pins are tied directly to the power supply or ground during Standard SPI or Dual SPI operation, the IOC bit must not be set to
1.