5.6.13 Reset#/Hold# Selection (HLDRST)

The HLDRST bit configures the RESET#/HOLD#/SIO3 pin to function as either a Reset# pin or a HOLD# pin when the IOC bit is set to 0. When HLDRST = 0 (factory default), the pin acts as HOLD#. When HLDRST = 1, the pin operates as RESET#. When IOC = 1, this pin functions as SIO3.