11.3.37 Peripheral Pin Select Input Register 23

Name:	RPINR23
Offset:	0x3330


Bit	31	30	29	28	27	26	25	24
	U2CTSR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	U1CTSR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	ADTRG31R[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	CLCINJR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 31:24 – U2CTSR[7:0] Assign UART2 Clear-to-Send (U2CTS) to the Corresponding RPn Pin bits

Bits 23:16 – U1CTSR[7:0] Assign UART1 Clear-to-Send (U1CTS) to the Corresponding RPn Pin bits

Bits 15:8 – ADTRG31R[7:0] Assign ADC Trigger (ADTRG31) to the Corresponding RPn Pin bits

Bits 7:0 – CLCINJR[7:0] Assign CLC Input J (CLCINJ) to the Corresponding RPn Pin bits

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