11.3.32 Peripheral Pin Select Input Register 18

Name:	RPINR18
Offset:	0x331C


Bit	31	30	29	28	27	26	25	24
	REFI2R[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	REFI1R[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	SENT2R[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	SENT1R[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 31:24 – REFI2R[7:0] Assign Reference clock input (REFI2) to the Corresponding RPn Pin bits

Bits 23:16 – REFI1R[7:0] Assign Reference clock input (REFI1) to the Corresponding RPn Pin bits

Bits 15:8 – SENT2R[7:0] Assign SENT2 Input (SENT2) to the Corresponding RPn Pin bits

Bits 7:0 – SENT1R[7:0] Assign SENT1 Input (SENT1) to the Corresponding RPn Pin bits

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