11.3.36 Peripheral Pin Select Input Register 22

Name:	RPINR22
Offset:	0x332C


Bit	31	30	29	28	27	26	25	24
	CLCINIR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	CLCINHR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	CLCINGR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	CLCINFR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 31:24 – CLCINIR[7:0] Assign CLC Input I (CLCINI) to the Corresponding RPn Pin bits

Bits 23:16 – CLCINHR[7:0] Assign CLC Input H (CLCINH) to the Corresponding RPn Pin bits

Bits 15:8 – CLCINGR[7:0] Assign CLC Input G (CLCING) to the Corresponding RPn Pin bits

Bits 7:0 – CLCINFR[7:0] Assign CLC Input F (CLCINF) to the Corresponding RPn Pin bits

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