11.3.31 Peripheral Pin Select Input Register 17

Name:	RPINR17
Offset:	0x3318


Bit	31	30	29	28	27	26	25	24
	CAN2RXR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	CAN1RXR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	SS4R[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	SCK4R[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 31:24 – CAN2RXR[7:0] Assign CAN2 Input (CAN2RX) to the Corresponding RPn Pin bits

Bits 23:16 – CAN1RXR[7:0] Assign CAN1 Input (CAN1RX) to the Corresponding RPn Pin bits

Bits 15:8 – SS4R[7:0] Assign SPI4 Select (SS4) to the Corresponding RPn Pin bits

Bits 7:0 – SCK4R[7:0] Assign SPI4 Clock Input (SCK4) to the Corresponding RPn Pin bits

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