11.3.35 Peripheral Pin Select Input Register 21

Name:	RPINR21
Offset:	0x3328


Bit	31	30	29	28	27	26	25	24
	CLCINER[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	CLCINDR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	CLCINCR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	CLCINBR[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 31:24 – CLCINER[7:0] Assign CLC Input E (CLCINE) to the Corresponding RPn Pin bits

Bits 23:16 – CLCINDR[7:0] Assign CLC Input D (CLCIND) to the Corresponding RPn Pin bits

Bits 15:8 – CLCINCR[7:0] Assign CLC Input C (CLCINC) to the Corresponding RPn Pin bits

Bits 7:0 – CLCINBR[7:0] Assign CLC Input B (CLCINB) to the Corresponding RPn Pin bits

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