5.7.14 Reset#/Hold# Selection (HLDRST)
The HLDRST bit configures the RESET#/HOLD#/SIO3 pin to function as either a
RESET# pin or a HOLD# pin when the IOC bit is set to 0. When HLDRST =
0 (factory default), the pin functions as HOLD#. When HLDRST =
1, the pin functions as RESET#. When IOC = 1, the
pin functions as SIO3.
