13.33.191

st_expand_path

Displays expanded path information (path details) for paths. The paths to be expanded are identified by the parameters required to display these paths with st_list_paths. For example, to expand the first path listed with st_list_paths -clock {MYCLOCK} -type {register_to_register}, use the command st_expand_path -clock {MYCLOCK} -type {register_to_register}. Path details contain the pin name, type, net name, cell name, operation, delay, total delay, and edge as well as the arrival time, required time, and slack. These details are the same as details available in the SmartTime Expanded Path window.

st_expand_path [-set name] [-clock clock_id -type value] [-in_to_out]

[-source_clock clock_id -sink_clock clock_id] [-source pin_list] [-sink pin_list]

[-analysis value]

[-index list_of_indices] [-format value]

Arguments

-set name

Displays a list of paths from the named set. You can either use the -set option to specify a set name, or use both - clock and -type to specify a set. A list of valid set names includes "in_to_out", as well as any user set names.

-clock clock_id

Displays the set of paths belonging to the specified clock domain. You can either use this option along with -type to specify a set or use the -set option to specify the name of the set to display.

-in_to_out

Specifies that the paths should be from the set "Input to Output, which includes paths that start at input ports and end at output ports.

-type value

Specifies the type of paths in the clock domain to display in a list. You can only use this option with the -clock option, not by itself. You can either use this option along with -clock to specify a set or use the -set option to specify a set name.


Value	Description
reg_to_reg	Paths between registers in the design
async_to_reg	Paths from asynchronous pins to registers
reg_to_asyn	Paths from registers to asynchronous pins
external_recovery	The set of paths from inputs to asynchronous pins
external_removal	The set of paths from inputs to asynchronous pins
external_setup	Paths from input ports to registers
clock_to_out	Paths from registers to output ports

-source_clock clock_id

Displays a list of timing paths for an inter-clock domain set belonging to the source clock specified. You can only use this option with the -sink_clock option, not by itself.

-sink_clock clock_id

Displays a list of timing paths for an inter-clock domain set belonging to the sink clock specified. You can only use this option with the -source_clock option, not by itself.

-source pin_list

Specifies a filter on the source pins of the paths to be listed.

-sink pin_list

Specifies a filter on the sink pins of the paths to be listed.

-analysis name

Specifies the analysis type for the paths to be listed. The following table shows the acceptable values for this argument:


Value	Description
maxdelay	Maximum delay analysis
mindelay	Minimum delay analysis

-index list_of_indices

Specifies which paths to display. The index starts at 1 and defaults to 1. Only values lower than the max_paths option will be expanded.

-format value

Specifies the file format of the output. The following table shows the acceptable values for this argument:


Value	Description
text	ASCII text format
csv	Comma separated value fie format