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18.4.39 DDR3PHY DCU Timing Parameter Register Name: DDR3PHY_DCUTPR Offset: 0xD4 Reset: 0x00000000 Property: Read/Write
Bit 31 30 29 28 27 26 25 24 TDCUT3[7:0] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16 TDCUT2[7:0] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 TDCUT1[7:0] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0 TDCUT0[7:0] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bits 31:24 – TDCUT3[7:0] DCU Generic Timing
Parameter 3
Bits 23:16 – TDCUT2[7:0] DCU Generic Timing
Parameter 2
Bits 15:8 – TDCUT1[7:0] DCU Generic Timing
Parameter 1
Bits 7:0 – TDCUT0[7:0] DCU Generic Timing
Parameter 0
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