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18.4.46 DDR3PHY BIST LFSR Seed
Register Name: DDR3PHY_BISTLSR Offset: 0x110 Reset: 0x1234ABCD Property: Read/Write
Bit 31 30 29 28 27 26 25 24 SEED[31:24] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 1 0 0 1 0
Bit 23 22 21 20 19 18 17 16 SEED[23:16] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 1 1 0 1 0 0
Bit 15 14 13 12 11 10 9 8 SEED[15:8] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 1 0 1 0 1 0 1 1
Bit 7 6 5 4 3 2 1 0 SEED[7:0] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 1 1 0 0 1 1 0 1
Bits 31:0 – SEED[31:0] LFSR seed for pseudo-random BIST
patterns.
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