24.3.64 Target Mode Extended
Transmit Buffer and Receive Data Response Threshold Register
Name:
I3CxECRTCON
Offset:
0x7A91CC
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
EXTTXBUFTHLD[2:0]
Access
R/W
R/W
R/W
Reset
0
0
0
Bit
15
14
13
12
11
10
9
8
Access
Reset
Bit
7
6
5
4
3
2
1
0
RSPDATTHLD[2:0]
Access
R/W
R/W
R/W
Reset
0
0
1
Bits 18:16 – EXTTXBUFTHLD[2:0] Extended TX Data
Buffer Threshold Value bits
This field controls
the number of empty locations (or above) in the Extended Transmit FIFO that trigger
the I3CxINTSTA[EXTCMDTXTHLDSTA] interrupt.
Value
Description
010
8
DWORDS
001
4
DWORDS
000
1
DWORDS
Bits 2:0 – RSPDATTHLD[2:0] Target Receive Data
Threshold Value for Initiating Response bits
This field controls the number
of received data bytes after which a response is generated in the Response
FIFO.
Value
Description
100
252
DWORDS
011
128
DWORDS
010
64
DWORDS
001
32
DWORDS
000
16
DWORDS
DS70005629B
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
