17.93 UDDRC AXI Port 2 Read QoS Configuration Register 0
| Name: | UDDRC_PCFGQOS0_2 |
| Offset: | 0x5F4 |
| Reset: | 0x02000E00 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| RQOS_MAP_REGION2[1:0] | |||||||||
| Access | R/W | R/W | |||||||
| Reset | 1 | 0 | |||||||
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| RQOS_MAP_REGION1[1:0] | RQOS_MAP_REGION0[1:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| RQOS_MAP_LEVEL2[3:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 1 | 1 | 1 | 0 | |||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RQOS_MAP_LEVEL1[3:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
Bits 25:24 – RQOS_MAP_REGION2[1:0] This bitfield indicates the traffic class of region2.
For dual address queue configurations, region2 maps to the red address queue.
Valid values are 1: VPR and 2: HPR only.
When VPR support is disabled (UDDRC_VPR_EN = 0) and traffic class of region2 is set to 1 (VPR), VPR traffic is aliased to LPR traffic.
Programming Mode: Quasi-dynamic Group 3
Bits 21:20 – RQOS_MAP_REGION1[1:0] This bitfield indicates the traffic class of region 1.
Valid values are:
- 0 : LPR
- 1: VPR
- 2: HPR
For dual address queue configurations, region1 maps to the blue address queue.
In this case, valid values are
- 0: LPR
- 1: VPR only
When VPR support is disabled (UDDRC_VPR_EN = 0) and traffic class of region 1 is set to 1 (VPR), VPR traffic is aliased to LPR traffic.
Programming Mode: Quasi-dynamic Group 3
Bits 17:16 – RQOS_MAP_REGION0[1:0] This bitfield indicates the traffic class of region 0.
Valid values are:
- 0: LPR
- 1: VPR
- 2: HPR
For dual address queue configurations, region 0 maps to the blue address queue.
In this case, valid values are:
0: LPR and 1: VPR only.
When VPR support is disabled (UDDRC_VPR_EN = 0) and traffic class of region0 is set to 1 (VPR), VPR traffic is aliased to LPR traffic.
Programming Mode: Quasi-dynamic Group 3
Bits 11:8 – RQOS_MAP_LEVEL2[3:0]
Separation level2 indicating the end of region1 mapping; start of region1 is (level1 + 1). Possible values for level2 are (level1 + 1) to 14 which corresponds to arqos.
Region2 starts from (level2 + 1) up to 15.
Note that for PA, arqos values are used directly as port priorities, where the higher the value corresponds to higher port priority.
All of the map_level* registers must be set to distinct values.
Programming Mode: Quasi-dynamic Group 3
Bits 3:0 – RQOS_MAP_LEVEL1[3:0]
Separation level1 indicating the end of region0 mapping; start of region0 is 0. Possible values for level1 are 0 to 13 (for dual RAQ) or 0 to 14 (for single RAQ) which corresponds to arqos.
Note that for PA, arqos values are used directly as port priorities, where the higher the value corresponds to higher port priority.
All of the map_level* registers must be set to distinct values.
Programming Mode: Quasi-dynamic Group 3