17.109 UDDRC AXI Port 4 Write QoS Configuration Register 0
| Name: | UDDRC_PCFGWQOS0_4 |
| Offset: | 0x75C |
| Reset: | 0x00000E00 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| WQOS_MAP_REGION2[1:0] | |||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 | |||||||
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| WQOS_MAP_REGION1[1:0] | WQOS_MAP_REGION0[1:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| WQOS_MAP_LEVEL2[3:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 1 | 1 | 1 | 0 | |||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| WQOS_MAP_LEVEL1[3:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
Bits 25:24 – WQOS_MAP_REGION2[1:0] This bitfield indicates the traffic class of region 2.
Valid values are:
0: NPW, 1: VPW.
When VPW support is disabled (UDDRC_VPW_EN = 0) and traffic class of region 2 is set to 1 (VPW), VPW traffic is aliased to NPW traffic.
Programming Mode: Quasi-dynamic Group 3
Bits 21:20 – WQOS_MAP_REGION1[1:0] This bitfield indicates the traffic class of region 1.
Valid values are:
0: NPW, 1: VPW.
When VPW support is disabled (UDDRC_VPW_EN = 0) and traffic class of region 1 is set to 1 (VPW), VPW traffic is aliased to NPW traffic.
Programming Mode: Quasi-dynamic Group 3
Bits 17:16 – WQOS_MAP_REGION0[1:0] This bitfield indicates the traffic class of region 0.
Valid values are:
0: NPW, 1: VPW.
When VPW support is disabled (UDDRC_VPW_EN = 0) and traffic class of region 0 is set to 1 (VPW), VPW traffic is aliased to NPW traffic.
Programming Mode: Quasi-dynamic Group 3
Bits 11:8 – WQOS_MAP_LEVEL2[3:0]
Separation level2 indicating the end of region1 mapping; start of region1 is (level1 + 1). Possible values for level2 are (level1 + 1) to 14 which corresponds to awqos.
Region2 starts from (level2 + 1) up to 15.
Note that for PA, awqos values are used directly as port priorities, where the higher the value corresponds to higher port priority.
All of the map_level* registers must be set to distinct values.
Programming Mode: Quasi-dynamic Group 3
Bits 3:0 – WQOS_MAP_LEVEL1[3:0]
Separation level indicating the end of region0 mapping; start of region0 is 0. Possible values for level1 are 0 to 13 which corresponds to awqos.
Note that for PA, awqos values are used directly as port priorities, where the higher the value corresponds to higher port priority.
All of the map_level* registers must be set to distinct values.
Programming Mode: Quasi-dynamic Group 3