17.49 UDDRC Address Map Register 2
| Name: | UDDRC_ADDRMAP2 |
| Offset: | 0x208 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| ADDRMAP_COL_B5[3:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| ADDRMAP_COL_B4[3:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| ADDRMAP_COL_B3[4:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ADDRMAP_COL_B2[3:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
Bits 27:24 – ADDRMAP_COL_B5[3:0]
- Full bus width mode: Selects the HIF address bit used as column address bit 5.
- Half bus width mode: Selects the HIF address bit used as column address bit 6.
- Quarter bus width mode: Selects the HIF address bit used as column address bit 7.
Valid Range: 0 to 7, and 15
Internal Base: 5
The selected HIF address bit is determined by adding the internal base to the value of this field.
If unused, set to 15 and then this column address bit is set to 0.
Programming Mode: Static
Bits 19:16 – ADDRMAP_COL_B4[3:0]
- Full bus width mode: Selects the HIF address bit used as column address bit 4.
- Half bus width mode: Selects the HIF address bit used as column address bit 5.
- Quarter bus width mode: Selects the HIF address bit used as column address bit 6.
Valid Range: 0 to 7, and 15
Internal Base: 4
The selected HIF address bit is determined by adding the internal base to the value of this field.
If unused, set to 15 and then this column address bit is set to 0.
Programming Mode: Static
Bits 12:8 – ADDRMAP_COL_B3[4:0]
- Full bus width mode: Selects the HIF address bit used as column address bit 3.
- Half bus width mode: Selects the HIF address bit used as column address bit 4.
- Quarter bus width mode: Selects the HIF address bit used as column address bit 5.
Valid Range: 0 to 7.
Internal Base: 3
The selected HIF address bit is determined by adding the internal base to the value of this field.
Programming Mode: Static
Bits 3:0 – ADDRMAP_COL_B2[3:0]
- Full bus width mode: Selects the HIF address bit used as column address bit 2.
- Half bus width mode: Selects the HIF address bit used as column address bit 3.
Valid Range: 0 to 7
Internal Base: 2
The selected HIF address bit is determined by adding the internal base to the value of this field.
- in Half bus width (MSTR.data_bus_width!=00) and
- PCCFG.bl_exp_mode==1
Otherwise, if Full Bus Width (MSTR.data_bus_width)==00), it is recommended to program this to 0 so that HIF[2] maps to column address bit 2.
Programming Mode: Static