Address Mirroring Enable (for multi-rank UDIMM implementations).
Some UDIMMs implement address mirroring for odd ranks, which means that the
following address, bank address and bank group bits are swapped: (A3, A4), (A5,
A6), (A7, A8), (BA0, BA1). Setting this bit ensures that, for mode register
accesses during the automatic initialization routine, these bits are swapped
within the UDDRC to compensate for this UDIMM/RDIMM/LRDIMM swapping.
This is not supported for LPDDR2 or LPDDR3 SDRAMs.
Programming Mode: Static
Note: This has no effect on the address of any other memory accesses, or of
software-driven mode register accesses.
| Value | Description |
|---|
| 0 |
For odd ranks, implement address mirroring
for MRS commands to during
initialization |
| 1 |
Do not implement address
mirroring |
