17.74 UDDRC Port Status Register
| Name: | UDDRC_PSTAT |
| Offset: | 0x3FC |
| Reset: | 0x00000000 |
| Property: | Read-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| WR_PORT_BUSY_4 | WR_PORT_BUSY_3 | WR_PORT_BUSY_2 | WR_PORT_BUSY_1 | WR_PORT_BUSY_0 | |||||
| Access | R | R | R | R | R | ||||
| Reset | 0 | 0 | 0 | 0 | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RD_PORT_BUSY_4 | RD_PORT_BUSY_3 | RD_PORT_BUSY_2 | RD_PORT_BUSY_1 | RD_PORT_BUSY_0 | |||||
| Access | R | R | R | R | R | ||||
| Reset | 0 | 0 | 0 | 0 | 0 |
Bit 20 – WR_PORT_BUSY_4 Indicates if there are outstanding writes for AXI port 4.
Programming Mode: Dynamic
Bit 19 – WR_PORT_BUSY_3 Indicates if there are outstanding writes for AXI port 3.
Programming Mode: Dynamic
Bit 18 – WR_PORT_BUSY_2 Indicates if there are outstanding writes for AXI port 2.
Programming Mode: Dynamic
Bit 17 – WR_PORT_BUSY_1 Indicates if there are outstanding writes for AXI port 1.
Programming Mode: Dynamic
Bit 16 – WR_PORT_BUSY_0 Indicates if there are outstanding writes for AXI port 0.
Programming Mode: Dynamic
Bit 4 – RD_PORT_BUSY_4 Indicates if there are outstanding reads for AXI port 4.
Programming Mode: Dynamic
Bit 3 – RD_PORT_BUSY_3 Indicates if there are outstanding reads for AXI port 3.
Programming Mode: Dynamic
Bit 2 – RD_PORT_BUSY_2 Indicates if there are outstanding reads for AXI port 2.
Programming Mode: Dynamic
Bit 1 – RD_PORT_BUSY_1 Indicates if there are outstanding reads for AXI port 1.
Programming Mode: Dynamic
Bit 0 – RD_PORT_BUSY_0 Indicates if there are outstanding reads for AXI port 0.
Programming Mode: Dynamic