21.5.51 DCode Hit Control Status Register
Bit Number | Name | Reset Value | Description |
---|---|---|---|
[31:0] | CC_DC_HIT_CNT | 0 | Counts the total number of cache hits that occurs on the cacheable region through the DCode bus. Rolls back after maximum value. This counter is put to reset value by setting CC_DC_HIT_CNTCLR. |