21.5.7 eNVM FPGA Fabric Remap Base Address Register
| Bit Number | Name | Reset Value | Description |
|---|---|---|---|
| [31:19] | Reserved | 0 | |
| [18:1] | SW_ENVMFABREMAPBASE | 0 | Offset within eNVM address space of the base address of the segment in eNVM, which is to be remapped to location 0x00000000 for use by a soft processor in the FPGA fabric. |
| 0 | SW_ENVMFABREMAPENABLE | 0 | 0: eNVM fabric remap not enabled for accesses by fabric master. The portion of eNVM visible in the eNVM window at location 0x00000000 of a soft processor’s memory space corresponds to the memory locations at the bottom of eNVM. 1: eNVM fabric remap enabled. The portion of eNVM visible at location 0x00000000 of a soft processor’s memory space of is a remapped segment of eNVM. |
Bits [18:N] of this bus indicate the base address of the remapped segment. The value of N depends on the eNVM remap section size, so that the base address is aligned according to an even multiple of segment size. The power of 2 size specified by SW_ENVMREMAPSIZE[4:0] (Table 21-9) defines how many bits of base address are used. For example, if the SW_ENVMREMAPSIZE[4:0] is 01111, this corresponds to a segment size of 64KB. 64KB is 2 to the power of 16. Therefore the value of N in this case, is 16. So the base address of the region, in this case, is specified by SW_ENVMREMAPSIZE[18:16].
This register should only be written by Cortex-M3 processor firmware using 32-bit accesses. The behavior of the system is undefined if other size accesses are used.