21.5.42 PLL Delay Line Select Control Register
| Bit Number | Name | Reset Value | Description | 
|---|---|---|---|
| [31:4] | Reserved | 0 | |
| 3:2 | PLL_FB_DEL_SEL | 0 | Must be programmed to a specific value by Libero SoC and never be modified after that. | 
| 1:0 | PLL_REF_DEL_SEL | 0 | Must be programmed to a specific value by Libero SoC and never be modified after that. | 
