21.5.29 MDDR I/O Calibration Control Register

Table 21-35. MDDR_IO_CALIB_CR
Bit Number	Name	Reset Value	Description
[31:15]	Reserved	0
14	CALIB_LOCK	0	Used in the DDRIO calibration block as an override to lock the codes during intermediate runs. When the firmware receives CALIB_INTRPT, it may choose to assert this signal by prior knowledge of the traffic without going through the process of putting the DDR into self refresh. This bit is only read/write.
13	CALIB_START	0	Used in the DDRIO calibration block and indicates that rerun of the calibration state machine is required.
12	CALIB_TRIM		Used in the DDRIO calibration block and indicates the override of the calibration value from the PC code/programmed code values.
[11:6]	NCODE	0	Used in the DDRIO calibration block and indicates DPC override NCODE from flash. This can also be overwritten from the firmware.
[5:0]	PCODE	0	Used in the DDRIO calibration block and indicates PC override PODE from flash. This can also be overwritten from the firmware.

[31:15]

Reserved

0

14

CALIB_LOCK

0

Used in the DDRIO calibration block as an override to lock the codes during intermediate runs. When the firmware receives CALIB_INTRPT, it may choose to assert this signal by prior knowledge of the traffic without going through the process of putting the DDR into self refresh. This bit is only read/write.

13

CALIB_START

0

Used in the DDRIO calibration block and indicates that rerun of the calibration state machine is required.

12

CALIB_TRIM

Used in the DDRIO calibration block and indicates the override of the calibration value from the PC code/programmed code values.

[11:6]

NCODE

0

Used in the DDRIO calibration block and indicates DPC override NCODE from flash. This can also be overwritten from the firmware.

[5:0]

PCODE

0

Used in the DDRIO calibration block and indicates PC override PODE from flash. This can also be overwritten from the firmware.