21.5.18 Software Interrupt Register
| Bit Number | Name | Reset Value | Description |
|---|---|---|---|
| [31:1] | Reserved | 0 | |
| 0 | SOFTINTERRUPT | 0 | 1: FIIC SOFTINTERRUPT is asserted 0: SOFTINTERRUPT signal is cleared |
| Bit Number | Name | Reset Value | Description |
|---|---|---|---|
| [31:1] | Reserved | 0 | |
| 0 | SOFTINTERRUPT | 0 | 1: FIIC SOFTINTERRUPT is asserted 0: SOFTINTERRUPT signal is cleared |
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