21.5.100 Watchdog Timeout Event
Bit Number | Name | Reset Value | Description |
---|---|---|---|
[31:1] | Reserved | 0 | |
0 | WDOGTIMEOUTEVENT | 0 | WDOGTIMEOUTEVENT is not affected by SYSRESETN. This allows firmware to determine if a system reset occurred due to a watchdog timeout event. This signal is not used as an interrupt to the Cortex-M3 processor. Reset to 0 by PORESETN only. |