21.5.101 Clear MSS Counters
| Bit Number | Name | Reset Value | Description |
|---|---|---|---|
| [31:6] | Reserved | 0 | |
| 5 | CC_DC_TRANS_CNTCLR | 0 | When set, the CC_DC_TRANS_CNT counter is reset. |
| 4 | CC_IC_TRANS_CNTCLR | 0 | When set, the CC_IC_TRANS_CNT counter is reset. |
| 3 | CC_DC_HIT_CNTCLR | 0 | When set, the CC_DC_HIT_CNT counter is reset. |
| 2 | CC_DC_MISS_CNTCLR | 0 | When set, the CC_DC_MISS_CNT counter is reset. |
| 1 | CC_IC_HIT_CNTCLR | 0 | When set, the CC_IC_HIT_CNT counter is reset. |
| 0 | CC_IC_MISS_CNTCLR | 0 | When set, the CC_IC_MISS_CNT counter is reset. |