21.5.68 MAC EDAC Transmitter Address Register

Table 21-76. MAC_EDAC_TX_ADR
Bit Number Name Reset Value Description
[31:26] Reserved 0
[25:13] MAC_EDAC_TX_2E_AD 0 Stores the address from Ethernet TX memory on which a 2-bit SECDED error has occurred.
[12:0] MAC_EDAC_TX_1E_AD 0 Stores the address from Ethernet TX memory on which a 1-bit SECDED error has occurred.