14.8.173 DFM8A

This component is supported by ACT 3 family.

Figure 14-203. DFM8A Logic Diagram
Figure 14-204. DFM8A Select Line Interconnection Schematic
  • Function: D-Type Flip-Flop with 4-input Multiplexed Data, active low Clear, and active high Clock
  • Input: D0, D1, D2, D3, S00, S01, S10, S11, CLK, CLR
  • Output: Q
Table 14-322. Truth Table
CLRS11S10S01S00CLKQn+1
0XXXXX0
1000XD0
100X0D0
10011D1
11X0XD2
1X10XD2
11XX0D2
1X1X0D2
11X11D3
1X111D3
Table 14-323. Modules
FamilySeqComb
ACT31
Note: The DFM8A macro represents the full ACT 3 S-Module.
Note: The following schematic describes the interconnections of the select lines.