14.8.137 DFE4A

This component is supported by ACT 1, MX families.

Figure 14-165. DFE4A Logic Diagram
  • Function: D-Type Flip-Flop with active high Enable and Preset, and active low Clock
  • Input: D, E, PRE, CLK
  • Output: Q
Table 14-253. Truth Table
PREECLKQn+1
1XX1
00XQ
01D
Table 14-254. Modules
FamilySeqComb
ACT 1/MX2