14.8.228 DLM4

This component is supported by ACT 2, ACT 3, 3200DX, MX, Accelerator families.

Figure 14-260. DLM4 Logic Diagram
  • Function: Data Latch with 4-input Multiplexed Data
  • Input: D0, D1, D2, D3, S0, S10, S11, G
  • Output: Q
Table 14-432. Truth Table
S10S11S0GQn+1
XXX0Q
0001D0
0011D1
X101D2
1X01D2
X111D3
1X11D3
Table 14-433. Modules
FamilySeqComb
All listed1