14.8.150 IODFEP

This component is supported by ACT 3 families.

Figure 14-178. IODFEP Logic Diagram
  • Function: D-Type Flip-Flop with active low Enable and Preset
  • Input: IOPCL, D, E, CLK
  • Output: Q
Table 14-277. Truth Table
IOPCLECLKQn+1
0XX1
11XQ
10D
Note: The CLK pin must be driven by the IOCLKBUF macro.
Note: The IOPCL pin must be driven by the IOPCLBUF macro.
Note: Uses an I/O module.