14.8.243 FA1

This component is supported by ACT 1, MX, SX, SX-A, SX-S, eX, Accelerator families.

Figure 14-277. FA1 Logic Diagram
  • Function: 1-bit adder with active high I/Os
  • Input: A, B, CI
  • Output: CO, S
Table 14-462. Truth Table
ABCISCO
00000
10010
01010
11001
00110
10101
01101
11111
Table 14-463. Modules
FamilySeqComb
ACT 1/MX3
SX, SX-A, SX-S, eX2
Note: * A 2 on the symbol implies 2 logic module delays only in ACT 1 and MX.