14.8.236 DLP1B

This component is supported by ACT 1, ACT 2, ACT 3, 3200DX, MX, SX, SX-A, SX-S, eX, Accelerator families.

Figure 14-270. DLP1B Logic Diagram
  • Function: Data Latch with active low Preset and active high Clock
  • Input: D, G, PRE
  • Output: Q
Table 14-448. Truth Table
PREGQn+1
0X1
10Q
11D
Table 14-449. Modules
FamilySeqComb
All1