14.8.226 DLM3

This component is supported by ACT 2, ACT 3, 3200DX, MX, Accelerator families.

Figure 14-258. DLM3 Logic Diagram
  • Function: Data Latch with 4-input Multiplexed Data
  • Input: D0, D1, D2, D3, S0, S1, G
  • Output: Q
Table 14-428. Truth Table
S1S0GQn+1
XX0Q
001D0
011D1
101D2
111D3
Table 14-429. Modules
FamilySeqComb
All listed1