14.8.131 DFE2D

This component is supported by ACT 1, MX families.

Figure 14-159. DFE2D Logic Diagram
  • Function: D-Type Flip-Flop with active high Preset, active low Enable, Clear, and Clock
  • Input: CLR, D, E, PRE, CLK
  • Output: Q
Table 14-241. Truth Table
CLRPREECLKQn+1
00XX0
11XX1
101XQ
100D
01XX*
Table 14-242. Modules
FamilySeqComb
ACT 1, MX2
Note: Your design should not allow both PRE and CLR to be asserted at the same time.