14.8.146 DFEG

This component is supported by SX, SX-A, SX-S, eX, Accelerator families.

Figure 14-174. DFEG Logic Diagram
  • Function: D-Type Flip-Flop with active low Enable, Preset, and Clear
  • Input: CLR, D, E, PRE, CLK
  • Output: Q
Table 14-271. Truth Table
CLRPREECLKQn+1
0XXX0
10XX1
111XQ
110D
Table 14-272. Modules
FamilySeqComb
All listed1