14.8.266 JKF2D

This component is supported by ACT 1, ACT 2, ACT 3, 3200DX, MX families.

Figure 14-300. JKF2D Logic Diagram
  • Function: JK Flip-Flop with active high Clear and active low Clock and K-Input
  • Input: CLR, J, K, CLK
  • Output: Q
Table 14-506. Truth Table
CLRJKCLKQn+1
1XXX0
000↓0
001↓Q
010↓!Q
011↓1
Table 14-507. Modules
FamilySeqComb
ACT 1/MX—2
Others11
Note: * A 2 on the symbol implies a 2 logic module delay on all families except ACT 1 and MX.