14.8.213 DLE2A
This component is supported by ACT 1, MX families.
- Function: Data Latch with active high Enable and Clear, and active low Clock
- Input: CLR, D, E, G
- Output: Q
| CLR | E | G | Qn+1 |
|---|---|---|---|
| 1 | X | X | 0 |
| 0 | 0 | X | Q |
| 0 | X | 1 | Q |
| 0 | 1 | 0 | D |
| Family | Seq | Comb |
|---|---|---|
| ACT 1/MX | — | 1 |
This component is supported by ACT 1, MX families.
| CLR | E | G | Qn+1 |
|---|---|---|---|
| 1 | X | X | 0 |
| 0 | 0 | X | Q |
| 0 | X | 1 | Q |
| 0 | 1 | 0 | D |
| Family | Seq | Comb |
|---|---|---|
| ACT 1/MX | — | 1 |
Rev: A