14.8.239 DLP1E

This component is supported by ACT 1, ACT 2, ACT 3, 3200DX, MX, Accelerator families.

Figure 14-273. DLP1E Logic Diagram
  • Function: Data Latch with active low Preset, Clock, and Output
  • Input: D, G, PRE
  • Output: QN
Table 14-454. Truth Table
PREGQNn+1
0X0
10!D
11QN
Table 14-455. Modules
FamilySeqComb
ACT 1/MX—1
Others1—