14.8.163 DFM4B

This component is supported by ACT 1, MX, Accelerator families.

Figure 14-191. DFM4B Logic Diagram
  • Function: D-Type Flip-Flop with 2-input Multiplexed Data, and active low Preset and Clock
  • Input: A, B, PRE, S, CLK
  • Output: Q
Table 14-302. Truth Table
PRESCLKQn+1
0XX1
10A
11B
Table 14-303. Modules
FamilySeqComb
ACT 1/MX2