14.8.237 DLP1C

This component is supported by ACT 1, ACT 2, ACT 3, 3200DX, MX, SX, SX-A, SX-S, eX, Accelerator families.

Figure 14-271. DLP1C Logic Diagram
  • Function: Data Latch with active low Preset and Clock
  • Input: D, G, PRE
  • Output: Q
Table 14-450. Truth Table
PREGQn+1
0X1
11Q
10D
Table 14-451. Modules
FamilySeqComb
All1